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Talavai's avatar
Talavai
Icon for New Contributor rankNew Contributor
2 years ago

Bug in HDMI TX IP preventing back-to-back writes to HDMI I2C master

HDMI IP 23.2-19.7.2, being configured as Source/TX with FRL support, AXI4S video interface (VVP Full), and I2C master, does not accept back-to-back writes to I2C master registers. The attached simula...
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ZH_Intel's avatar
ZH_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi Talavai,

I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.


Thank you.

Best Regards,

ZulsyafiqH_Intel