Forum Discussion
Talavai
New Contributor
2 years agoBug in HDMI TX IP preventing back-to-back writes to HDMI I2C master
HDMI IP 23.2-19.7.2, being configured as Source/TX with FRL support, AXI4S video interface (VVP Full), and I2C master, does not accept back-to-back writes to I2C master registers. The attached simula...
ZH_Intel
Frequent Contributor
2 years agoHi Talavai,
Good day.
Hope my previous reply was helpful.
Is there anything else I can help you with regards to this case?
If there is no further inquiries, I will transition this thread to community support.
Thank you.
Best Regards,
ZulsyafiqH_Intel