Forum Discussion
Talavai
New Contributor
2 years agoBug in HDMI TX IP preventing back-to-back writes to HDMI I2C master
HDMI IP 23.2-19.7.2, being configured as Source/TX with FRL support, AXI4S video interface (VVP Full), and I2C master, does not accept back-to-back writes to I2C master registers. The attached simula...
ZH_Intel
Frequent Contributor
2 years agoHi Talavai,
Thank you for reaching out.
Just to let you know that Intel has received your support request and currently we are confirming the details with our internal team.
I shall come back to you with findings.
Thank you for your patience.
Best Regards,
ZulsyafiqH_Intel