Base Address of the PCIe Hard IP of Cyclone V GX

What is the base address of the BAR(for example BAR0) in the PCIe Hard IP of Cyclone V GX when using Avlon-ST interface.

Because I want to know the offset address of the BAR(for example BAR0), when the PC read or write the BAR.

For example when the user side get a TLP from the PCIe Hard IP of Cyclone V GX, I need to judge the address in the Header1 of the TLP.

But I don't know the offset address which the PC access.