AXI-S and XPM Macros

Hi,

If you're looking for template, can go to Insert Template icon after creating new file see the image below.

Can also go to File -> Create / Update to convert current file to other file format for example: bdf file to VHDL file (Pro don't have this).

If for IP or Qsys, the instantiation file will be generated automatically after HDL generation. Each IP has its specific document respectively.

Design Recommendations documents probably can help you as well check the links below: https://www.intel.com/content/www/us/en/docs/programmable/683082/22-2/recommended-hdl-coding-styles.html (Pro) https://www.intel.com/content/www/us/en/docs/programmable/683323/18-1/recommended-design-practices.html (Standard/Lite)

VHDL Implementing Functions: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/vhdl.html?wapkw=VHDL%20implementation

Verilog Design Examples: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/verilog.html

You can find more resources in Intel website https://www.intel.com/content/www/us/en/homepage.html. Let me know if I miss anything.

Best Regards,

Sheng

p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.