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BobSD's avatar
BobSD
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Avalon-MM to PCIe address translation table settings

Trying to DMA from DDR3 memory through PCIe Txs port back to external CPU memory using a mSGDMA engine in a Cyclone V GT device. The mSGDMA is working and I can see the Txs Avalon-MM interface transa...
Pcie
  • Wincent_Altera's avatar
    Wincent_Altera
    2 years ago

    Hi BobSD,

    From what you provided compared with the user guide. It is seen to be correct.
    But I cannot 100 % confirm that as it is your custom design.

    As you are using a single MSGDMA.
    What alternative you can do to double confirm is to refer to the design example provided in the previous post.
    Set the parameter accordingly and monitor if you are able to get the desired output/result.

    Let me know if there is any other things I can help you.

    Regards,

    Wincent_Intel

BobSD's avatar
BobSD
Icon for New Contributor rankNew Contributor
2 years ago

Final update:

We were never able to get address translation to work so I changed the PCIe Avalon-MM address setting from 32 bits to 64 bits.

From this:

To this:

This change eliminated the Avalon to PCIe address translation and the DMAs into external CPU memory across the PCIe bus began to work immediately.