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nelky's avatar
nelky
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

avalon_master_waitrequest signal is always high

Hi, I am creating a project using Quartus Prime Pro on AGFB022R25A2I3V to read and write to single-port on-chip RAM. When I tried to simulate using modelsim, I found that the avalon_master_waitrequ...
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sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

Is the host only connected to the RAM? Is it connected to any other components?

waitrequest is held high automatically by the interconnect if an agent is not ready yet to respond to a command or if the agent manually controls the waitrequest signal.