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sadad's avatar
sadad
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6 years ago

Avalon Interconnect Dynamic Bus Sizing and Bursts

Hello! My Avalon-MM master has 32bit data width and is bursting capable. Now i connect an Avalon-MM slave with 8bit data width which is also bursting capable. Will a 32bit read or write access to ...
sadad's avatar
sadad
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6 years ago

in your design i could not see any burst signals to the onchip ram in the qsys schematic view , so i think there will be a bursting adapter in your interconnect.

=> would you show me a screenshot of your qsys schematic