Forum Discussion
sadad
New Contributor
New ContributorAvalon Interconnect Dynamic Bus Sizing and Bursts
Hello! My Avalon-MM master has 32bit data width and is bursting capable. Now i connect an Avalon-MM slave with 8bit data width which is also bursting capable. Will a 32bit read or write access to ...
sadadNew Contributor
New Contributorin your design i could not see any burst signals to the onchip ram in the qsys schematic view , so i think there will be a bursting adapter in your interconnect.
=> would you show me a screenshot of your qsys schematic
