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sadad's avatar
sadad
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6 years ago

Avalon Interconnect Dynamic Bus Sizing and Bursts

Hello! My Avalon-MM master has 32bit data width and is bursting capable. Now i connect an Avalon-MM slave with 8bit data width which is also bursting capable. Will a 32bit read or write access to ...
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
6 years ago

Once set to VHDL, I can see the simulation already. Did you make changes to the parameter to the slave? As I remember correctly, this design example uses number of symbols 4 and burst count with 1 on the slave side.

BInos's avatar
BInos
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6 years ago

Thats the point of my tb:

Test access from 32bit (symbolcount 4) mm master to bursting capable 8bit (symbolcount 1) mm slave.

And see if the Avalon Bus Adapter will issue 4x8bit read/write bursts.