Without seeing the design, it's hard to tell what's going on. I'd recommend creating a Platform Designer testbench system. Create a new .qsys file that includes just your custom component, and export all its interfaces. Then choose to create a testbench system from the Generate menu. This will automatically create a system with the master BFM (and clock and reset BFMs) set up appropriately and connected to your IP. See this online training for details:
https://www.intel.com/content/www/us/en/programmable/support/training/course/oaqsyssim.html
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