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Honored ContributorAudio Extract MegaCore
Hello,
we are planning to buy Audio Extract core for audio extraction from SDI signal. The datasheet says, that the output is 12S/AES. Is there a mistake and it is possible to get I2S audio output, because it is exactly what we need. Thanks.24 Replies
Altera_ForumCan Audio Extract IP core extract audio data from any BT656 or BT1120 video streams with embedded audio or it only works within Altera SDI IP core?
Can Audio Embed IP core embed audio data into any BT656 or BT1120 video streams or it only works within Altera SDI IP core?- Altera_Forum
SDI core and audio embed/extract cores are separate. Since SDI core will give/take BT656 on output, it means, that You can use audio embed/extract on any BT656 stream You have.
P.S. or BT1120. - Altera_Forum
What is AES Output Module in the Audio Extract IP Megacore which supposed to transform "internal AES" to "real AES" output as seen at the attached image from Serial Digital Interface (SDI) MegaCore Function User Guide?
https://www.alteraforum.com/forum/attachment.php?attachmentid=7511 - Altera_Forum--- Quote Start --- Yes. I2S is not mentioned in the datasheet because Altera didn't make this core. It was developed by a 3rd party company and later sold to Altera afaik. --- Quote End --- Do You mean, that it was developed by Omnitek?
- Altera_Forum
Don't remember which company it was... And probably doesn't make any difference now? :)
- Altera_Forum
Yes, it is Omnitek.
Their Audio Embed / Extract IP is identical to Altera's. Omnitek's Audio Embed / Extract IP has I2S or AES selection settings and has some minor differences from Altera's. - Altera_Forum--- Quote Start --- Hi Socrates May I ask you a question about the output of SDI extractor? The SDI extractor has three outputs - aud_ws, aud_data, aud_clk_out. Are these three signals I2S signals? (I've searched keyword I2S in SDI user guide and cannot find it) If so, I think I can set these three signals as output pins and connect to some audio processing IC. Thanks. --- Quote End --- Hi, YUFU0511 and Socrates! SDI Audio Extractor has not only aud_clk_out ( which is an output ), but also aud_clk ( which is an input ). Both are described as being 3.072 MHz. How to deal with that? Where from do I have to take 3.072 MHz to feed to aud_clk input? From aud_clk_out output? Does that mean, that I have to connect aud_clk_out to aud_clk input? It seems strange, that Audio Extractor may need anything else besides input video signals. Did You try connecting aud_ws, aud_data, aud_clk_out to I2S inputs of any audio processing IC? If Yes, the does it really recognize them as I2S ?
- Altera_Forum
Is it possible to access SDI Audio Embedder / Extractor IP Cores by NIOS II if Audio Embedder / Extractor IP Cores are connected to NIOS II in QSYS via Avalon Memory Mapped Interface?
If Yes, then please point me where can I find an example or please show Your own example in this thread. - Altera_Forum--- Quote Start --- Hi, YUFU0511 and Socrates! SDI Audio Extractor has not only aud_clk_out ( which is an output ), but also aud_clk ( which is an input ). Both are described as being 3.072 MHz. How to deal with that? Where from do I have to take 3.072 MHz to feed to aud_clk input? From aud_clk_out output? Does that mean, that I have to connect aud_clk_out to aud_clk input? It seems strange, that Audio Extractor may need anything else besides input video signals. Did You try connecting aud_ws, aud_data, aud_clk_out to I2S inputs of any audio processing IC? If Yes, the does it really recognize them as I2S ? --- Quote End --- Hi, Aphraton, About the connection question, you may see an example design for audio extractor. (The example design can be found in the folder xxx/altera/(your quartus II verions)/ip/altera/audio_embed/example/) For your second question, in my case, I extract AES audio and write my own module to convert the AES audio to I2S signal.
- Altera_Forum--- Quote Start --- For your second question, in my case, I extract AES audio and write my own module to convert the AES audio to I2S signal. --- Quote End --- Does that mean, that extracted set of signals aud_ws, aud_data, aud_clk_out is not according to I2S as it was earlier said by Socrates?
