ASI output IP - Easy to use?

Hi Thiago,

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The SPI output from the demodulator has the attached waveform.

It is simple: 8 bits data, CLK, sync byte, valid byte. The CLK frequency is around 5 MHz. TTL levels.

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That can easily be captured using a low-end FPGA or CPLD.

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It would be better if it was free :-P

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If you know what you have to do to reformat the data, then it would be easy to write your own. You could always create a simulation with the Altera ASI IP code, and look at what the output data stream looks like for your given input data, and then write a core to reproduce that functionality.

Cheers,

Dave