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Altera_Forum
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9 years ago

Arria10 PCIe: no completion for endpoint MRd

Hello board, I am using the Arria10 PCIe HIP (avst) as an endpoint. I have PIO read/write working as well as posted writes. I am trying to get non-posted read working, but I have not had m...
Altera_Forum's avatar
Altera_Forum
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9 years ago

After fiddling with the transaction size I realized that 1 DWORD read request work. Anything bigger than 1 DWORD is ignored. I read somewhere that Avalon-MM interface has a single-dword completer mode; however, I am using the Avalon-ST interface so I don't think it applies.