Hi, We are trying to bring-up PCIe (Gen1 x1) interface using Arria 10 PCIe Hard IP on Intel's Arria10 Signal Integrity development board. The design is found to be working in simulation, but on the...
Hi SK,
Even if we have our own soft PCIe IP core, we should still use Arria10 Native Transceiver PHY, right? In that case, can we configure the transceiver for PCIe protocol?
Rgds,
sunil