Forum Discussion
diddi1057
New Contributor
5 years agoArria 10 transceiver ATX PLL unlocked, when reference clock not present during device configuration
Hi all,
please refer to attachment pdf ....
Thanks
- 5 years ago
Hi,
good news:
1. I have successfully simulated design in Modelsim -> ATX PLL relocked after REFCLK is present ->o.k.
2. I have successfully downloaded design to hardware -> ATX PLL relocked after REFCLK is present ->o.k.
Thank's for your advice!
Regards
diddi1057
CheepinC_altera
Regular Contributor
5 years agoHi,
Thanks for your update. Glad to hear that you have managed to resolve the problem and get your design working.