Forum Discussion

diddi1057's avatar
diddi1057
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Arria 10 transceiver ATX PLL unlocked, when reference clock not present during device configuration

Hi all, please refer to attachment pdf .... Thanks
  • diddi1057's avatar
    diddi1057
    5 years ago

    Hi,

    good news:

    1. I have successfully simulated design in Modelsim -> ATX PLL relocked after REFCLK is present ->o.k.

    2. I have successfully downloaded design to hardware -> ATX PLL relocked after REFCLK is present ->o.k.

    Thank's for your advice!

    Regards

    diddi1057

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Would you mind to share with simulation which could be directly simulated in Modelsim ie using msim_setup.tcl without going through native link. This would be helpful to facilitate further debugging. Thank you.


  • diddi1057's avatar
    diddi1057
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi,

    attached project using msim_setup.tcl .

    Created /mentor/test_atx_pll_no_lock.do -> Adapt QSYS_SIMDIR