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Altera_Forum
Honored Contributor
8 years agoArria 10 DDR3 with Bank 3G and 3H
Hi all, I have a question about the bank usage for DDR3 memory in the Arria 10. I'm using the following hardware: Arria 10: 10AX115R3F40E2SG DDR3 memory: Micron MT41J128M16HA-187E:D ...
Altera_Forum
Honored Contributor
8 years agoThank for your answer.
Concerning the automatic pin assignment, I tried it and found that this is very useful. Concerning Fig 93, I read it and what I said, that is, [1] 1-11 and 12-23 (bad case) [2] 12-23 and 36-47 (good case) both of them may satisfy this condition, I think. If you are talking the "adjacent" lane, [2] may not satisfy the condition but it's OK in the Fitter. BTW, concerning the address (a[13:0]), we have to use only the specific pins. I mean that can't we swap them among address pins? regards, Junichi