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Altera_Forum
Honored Contributor
Honored ContributorArea Optimized FFT hardware design
Hi, I'm developing my own custom hardware design of FFT algorithm (radix-2, CORDIC based), the design is resources constrained, with certain timing requirements to be met (timing constraints ar...
Altera_ForumHonored Contributor
Honored ContributorThis is a master thesis, it would help you a lot. This guy implemented an r22sdf FFT core.
vlsi1.engr.utk.edu/ece/amiller-thesis.pdf Try synthesizing his VHDL code (i did it and it works)
