Forum Discussion
Hi Wincent,
Please do not close the ticket as we are still working on it. Sorry for bit delay in response and now trying to catch up to the pace.
Did you able to capture the LTSSM signal from Signal tap ? just to ensure the PCIe is able to link up.
No we could not capture the LTSSM signal from Signal Tap at first place. Will retry it and update you ASAP.
Did you connect the PCIe external power connector to 6-pin 12V DC power connector in the FPGA to avoid FPGA damage due to insufficient power ?
Yup absolutely! we did connect the external power connector.
The API call failure I mentioned before is that happened when Adzim provided some modified VHDL code for the PCIe_DMA transfer example design + Avalon FIFO + counter (basically he tested altered the signal connectivity). While programmed with that modified design, I got API call failure.
- Wincent_Altera3 years ago
Regular Contributor
Hi Sijith,
The API call failure I mentioned before is that happened when Adzim provided some modified VHDL code for the PCIe_DMA transfer example design + Avalon FIFO + counter (basically he tested altered the signal connectivity). While programmed with that modified design, I got API call failure.
>> Can you file another forum case and select the "catagory" as EMif so that Adzim can take loop back on the API failure ?
Regards,
Wincent_Intel- Wincent_Altera3 years ago
Regular Contributor
Hi
A fews follow up had been make.We have not hear from you and this Case is idling. It is not recommended to idle for too long.
Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause
Hence, This thread will be transitioned to community support.
If you have a new question, feel free to open a new thread to get support from Intel experts.
Otherwise, the community users will continue to help you on this thread. Thank you
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Regards,
Wincent_Intel