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Sijith's avatar
Sijith
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

API calls failed while running PCIe DMA transfer example design

Hi, I was working the PCIe DMA transfer example design for Arria 10. I have added a counter custom IP which counts upto 1000, and An Avalon FIFO IP with the design. My intention is to write the data...
Memory
Pcie
treble99's avatar
treble99
Icon for New Contributor rankNew Contributor
3 years ago

Hello Wincent,

I have a skeleton tb which I have based on the threads you mentioned. But it is still not complete. I am uploading a copy. (sim_tb.sv)

I have problem with inheriting the correct BFM, the ddr has several BFMs but which one would be correct? How to determine that?

Inheriting the BFM, what would be the path for it?

Can you confirm that the instantiation is correct?

I am also attaching the base .sv file that I am using as reference (sopc_system_bfm_master_tb.sv)

Let me know if you need more information.

Best,
Manish

treble99's avatar
treble99
Icon for New Contributor rankNew Contributor
3 years ago

Hello Wincent,

I realized I did not provide additional files. The project zip was exceeding the size. I am attaching a zip file (PCIE_DDR_ref_files.zip) which contains the generated tcl and testbench output(only some of it.)

Also attaching the source repo for re-creating the Design in case you would like to do that (PCIE_DDR.zip)

Let me know if you would require any more information.

Best,

Manish