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Are you interested in a full scale simulation? are you testing the DDR2 controller or something that connects to it?
You could try writing a bus functional model of the DDR2 controller - that would give massive speed ups.
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Hi,
Thank you Tricky . I'm testing my logic which is interfacing to the local_ side of the DDR Controller.
It's okay to have slow simulation but the thing is that it spends 40 minutes just to complete initialization, then i can start access the DDR2 controller !!! (I wonder why I need to initialize that long for functional simulation???)
There should be a better way, right?
Jeff
Honored Contributor
