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Altera_Forum
Honored Contributor
Honored Contributoraltmemphy with 2 ram chips
hello all, Now I'm trying to implement one controller using Altmemphy to interface with two 8-bit DDR2 SDRAM chips on Stratix3.But when I share the address and control signals to both of these dev...
Altera_ForumHonored Contributor
Honored ContributorSharing signals, at least for some of the DDR signals, is only possible as connecting both DDR2 RAM pins to a single FPGA pin. Only clock pins can be multiplied. This is the normal situation with RAM modules where 16 and more RAMs are connected to the address and controld lines.
