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Altera_Forum
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18 years ago

altmemphy with 2 ram chips

hello all, Now I'm trying to implement one controller using Altmemphy to interface with two 8-bit DDR2 SDRAM chips on Stratix3.But when I share the address and control signals to both of these dev...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

I guess, the invalid signal-splitter fan-outs means that you connected two physical pins where the IP core expects only one. Altmemphy supports banks of multiple RAM with MEM_IF_CS_WIDTH parameter, but with all ports used as a bus except for the indiviual control signals.