Wow what a strange complaint. I have designed processing cores and you can't get the performance without the pipeline. So you can either sacrifice the performance and use the /e core or you can accept the resource usage of the higher performance cores.
None of my designs to date have used an OS. I tend to burden the processor with a lot of control and communication logic that would be extremely time consuming and even impossible to implement in firmware. The processor has become a critical component in my designs. As such I have no problem sacrificing a small percentage of the chip to it. I get way more functionality per gate from the processor than any other piece of firmware. My firmware exists to perform time-critical functions that are impossible to do in a processor.
Even the /s and /f cores are pretty small. That fact that you don't find these sizes acceptable would indicate that you are not going to use the processor for much (not getting your value). If you're not going to use the processor for much then why not just implement the needed functions in firmware. Or add a hard micro-controller to your board and interface it with the FPGA. The price/gate for the NIOS is very reasonable. Throw in all of the ease-of-use issues and the NIOS is a no-brainer.
Jake