Honored Contributor
Honored ContributorI believe you may be overlooking something.
What is providing the reference clock for your transmit PLL? The compensation FIFO is a phase compensation FIFO not a frequency compensation FIFO (no such thing exists). Your transmitter is using a reference clock provided on the board for it's serial clock and parallel clock. If you are using the recovered receive clock as the clock for your input to the Transmit compensation FIFO, and you are not somehow locking your transmit reference clock to the receive clock, you will most definitely get overrun or underrun errors. Please tell me if I have overlooked something in your description but I haven't seen anything that indicates your TX reference clock is locked to the recovered receive clock. Jake
