Hi, I am using the ALT2GXB with the Stratix II GX ep2sgx90ff1508c3 board... I configured the GXB using the Mega core from the quartus... When I run the GXB on the hardware the recieved data is different from the transmitted data.. Actually I gave the output of the counter(16bit counter running at 312.5MHz) as the transmitter input to the GXB.... I used the Locations as G1,G4 in the FPGA as the RXDATA & TXDATA (serial lines) connected to the HSMA TX_P3 & HSMA_RX_P3 pair.... I have attached the BDF file that I used as my design.Also the CSV file obtained while running the Signal tap II analyser.... DO i have missed anything while configuring the ALT2GXB..... Thanks Santosh

Hi I am doing a project on the serial communication using the transceivers present in the Stratix II GX ep2sgx90ff1508c3 For this i am using the HSMC connector slot available on the board for the loopback operation. SO now I have 6 TX-RX channels on HSMA & 4 TX-RX channels on HSMB connections.. If I insert the HSMC cards(connectors) that is attached here in the HSMC slot the loopback operation should work properly right??? Or if any other hardware need to be connected like cables to HSMC connectors as told in the High Speed Mezzanine Card (HSMC) Specification link:www.altera.com/literature/ds/hsmc_spec.pdf ??? Apart from assigning the TXDATA & RXDATA pin locations that are available on the HSMC connectors any other signals should be assigned while doing pin assignment. I only assigned the TXDATA & RXDATA pin locations thats it.... Should I assigned the signals like HSMA_CLK_IN0,JTAG_TDO,JTAG_TMS,HSMA_D0-D3,HSMA_JTAG_TDO,JTAG_TCK,HSMA_SDA.... I am new to the HSMC connectors please any one who knows about it ........ please reply.......

you only need TXDATA and RXDATA assignments for the GXBs

--- Quote Start --- When I run the GXB on the hardware the recieved data is different from the transmitted data.. Actually I gave the output of the counter(16bit counter running at 312.5MHz) as the transmitter input to the GXB.... --- Quote End --- I didn't look at your design files, but I'll tell you what you should have. The TX-to-RX path is serial, so whatever you send in parallel at the transmitter can be misaligned by any number of bits when received at the receiver. The receivers have word-alignment and bit-slipping controls. You need to first use those to align the receiver to your transmitted 8-bit/16-bit/32-bit data, and only then will your transmit data and receive data match. For example, you could send the static pattern ABCDh, and bit-slip at the receiver until you start receiving ABCDh, and then you would switch the transmitter to your counter. Cheers, Dave

Dear Sir, Thank you very much for the reply.......... I want to know how to make the receiver being aligned to the txdata for the first time... can you suggest some documents which can guide more about this alignment.......... --- Quote Start --- I didn't look at your design files, but I'll tell you what you should have. The TX-to-RX path is serial, so whatever you send in parallel at the transmitter can be misaligned by any number of bits when received at the receiver. The receivers have word-alignment and bit-slipping controls. You need to first use those to align the receiver to your transmitted 8-bit/16-bit/32-bit data, and only then will your transmit data and receive data match. For example, you could send the static pattern ABCDh, and bit-slip at the receiver until you start receiving ABCDh, and then you would switch the transmitter to your counter. Cheers, Dave --- Quote End ---

Create a Modelsim simulation with the transceiver and test the different control signals in that. Then in hardware use SignalTap II to compare the simulation to the hardware. SignalTap will not be able to probe the high-speed SERDES lanes and internal GXB signals, but you will be able to see how the received parallel output pattern is bit-shifted relative to the transmit pattern. Start with some simple patterns, eg. 5555h will be received as either 5555h or AAAAh, and if you assert the bit-slip control, you can change (bit-slip) the pattern. There are some transceiver debug application notes and online webinars. Look on the Altera web site. Cheers, Dave

ALT2GXB Help................ | Altera Community

23 Replies

Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---

can you please explain me how we can use these in the pcie identification.......
--- Quote End ---
PCIe device identification is identical to PCI device identification. The configuration space of the device contains device and manufacturer IDs, and contains the number of BARS, their sizes, whether they are prefetchable, etc.

These parameters are entered by the user when designing the PCIe IP core. I haven't use Altera's PCIe core (other than to test their reference designs), but I imagine there is a place in the MegaWizard to override the PCIe IDs, or at least the subvendor IDs.

Cheers,
Dave
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---

I saw in the document Stratix II GX PCI Express Development Board that is present in the following link

www.altera.com/literature/manual/mnl-s (http://www.altera.com/literature/manual/mnl-s)2gx-pci-express-devkit.pdf

in the fpp configuration section(page 24) we have the figure 2–8. which explains the concept for the pcie configuration, in this we have to select config_mode[1:0] as "00" & dipsw+pgm[2:0] for the configuration file page select - 0,1,2.....

in the same pdf under the max ii cpld configuration controller(page 27) it was told to use the pfl mega function .....

can you please explain me how we can use these in the pcie identification.......
--- Quote End ---
These references have nothing to do with PCIe identification, they're related to configuring FPGAs. Here's a more detailed reference on that subject, perhaps it is clearer;

http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf)

Cheers,
Dave
Altera_Forum
Honored Contributor
14 years ago
Thank you very much Sir for your reply ..........

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ALT2GXB Help................

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