Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

alt_ddio_in puzzles inside Deserializer

hi, gals and guys, in recent days, i am working on a deserializer to interface with a high speed ADC. It's a 12-bit, DDR interface, with bit clock running @240 MHz. I use the alt_ddio_in to construct...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

hi, FvM, yea, i think you are right. After several day's work, i got an somehow acceptable solution for this. I found that the 240 MHz requirement is a little higher for the DDIO_IN registers inside ep2c35c8 device. I made two tests to verify this idea. Firstly, i decrease the launch clock to 180 MHz, i found that the ddio_in register worked fine. And then i migrated this design into ep2c35c6, even the 240 MHz was working. So this answers my question.

thanks for ur helpful suggestions, FvM.

regards,

eric