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Altera_Forum
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17 years ago

alt_ddio_in puzzles inside Deserializer

hi, gals and guys, in recent days, i am working on a deserializer to interface with a high speed ADC. It's a 12-bit, DDR interface, with bit clock running @240 MHz. I use the alt_ddio_in to construct...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

From the bitmap,I can't see which clock is actually used for the DDIO register. But the result suggests that setup- or hold times are violated.