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sumanth1's avatar
sumanth1
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3 years ago

AGILEX ETILE ETHERNET IP

HI

I am using AGILEX FPGA -AGFB012R24B2I3E.

I want to configure 10G Base-T Ethernet PHY on AGILEX - E tile Bank. The external Phy is capable for XAUI, XFI, RXAUI interfaces protocol. Now, I am using E-tile Ethernet IP for Agilex. it is not generating MDIO and MDC pin through IP.

Please suggest Which IP need to use for configuring 10G BASE-T and provide any reference design for Ethernet MDIO access to configure external PHY.

4 Replies

  • ZiYing_Intel's avatar
    ZiYing_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi sumanth1,


    Thanks for submitting the issue.

    Please do let me have some time to look into your case and I will get back to you with findings.


    Best regards,

    Zi Ying


    • sumanth1's avatar
      sumanth1
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hi Zi Ying,

      Thanks for your replay. we have gone thru your link but that Triple Speed Ethernet IP is for 1G only and we require to interface 10G.

      please let me know the solution.

      --

      Regards,

      Sumanth Raju

  • ZiYing_Intel's avatar
    ZiYing_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi sumanth1,

    Since I have addressed your question and didn't hear any feedback from you, I am now close the case. If you still have question after the case closed, please do feel free to submit another issue.

    Best regards,

    Zi Ying