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nskim's avatar
nskim
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1 month ago

Agilex 7 R-Tile CXL Type-2 IP Hang with Incomplete CXL.cache Operations

Device: DK-DEV-AGI027RBES (Power Solution 2) Software Version: Quartus Prime Pro 24.3 IP Core: CXL Type 2 Hard IP Issue Description:  We observed that the CXL Type-2 IP can hang when CXL.cache tr...
Cxl
RongY_altera's avatar
RongY_altera
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1 month ago

Hi,

So far I don't see a known issue directly related to this. For such situation, I suggest you to check Channel Crediting section in the CXL spec and monitor corresponding credit count in the design. 

 

Regards,

Rong

 

  • yangz's avatar
    yangz
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    30 days ago

    Hi Rong,

    I checked the CXL credit usage through the Debug Access Memory Map and monitored the following registers:

    • 0x01001100: DCOH CXL Status Register
    • 0x01001108: DCOH Error Status Register
    • 0x00051410: CXL Link Layer Rx Credit Control Register
    • 0x00051418: CXL Link Layer Rx Credit Return Status Register
    • 0x00051420: CXL Link Layer Tx Credit Status Register
    • 0x00051D08: Credits Available

    When the system crash occurs, I observed that mem_r_avail (number of available CXL.mem request credits) drops from 64 to 0, indicating that the CXL.mem request credits are fully consumed. However, I did not observe any other abnormal behavior related to stalled CXL.cache operations.

    Are there any additional debug registers you would recommend checking to better understand the status of the CXL.cache interface?

    Thanks,
    Yang