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GerhardCadek's avatar
GerhardCadek
Icon for Occasional Contributor rankOccasional Contributor
1 month ago
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Agilex 5 Reset Sequencer - Design Assitant reports IPC-40038 violation

Hi, I am using 2x25Gbit PCS/PMA function only (with FEC) and 2x10Gbit PCS/PMA function only (without FEC) in my Agilex 5 design (device A5ED043AB32AE3V, Quartus Pro 26.1). 25Gbit transceiver are usi...
Ethernet
Transceiver
  • Ash_R_Altera's avatar
    Ash_R_Altera
    25 days ago

    Hi,

    I have checked with the internal team. The warning against the rule IPC-40038 can be ignored safely.

     

    Regards

GerhardCadek's avatar
GerhardCadek
Icon for Occasional Contributor rankOccasional Contributor
1 month ago

Hi,

yes exactly. There are two Reset Sequencer IPs, one for each of the two banks / sides. Each Reset Sequencer IP delivers one pma_cu_clk to the two PCS/PMA units in their IO bank. This follows obviously your and my understanding as well as how I read the documentation. Nevertheless, the Design Assitant reports the IPC-40038 violation with severity level critical. Is it safe to ignore this warning as it seems to be erroneous?

Best regards

Gerhard