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Hi Kaz please have a look at the two files that i have uploaded. I made a finite state machine which when driven clocks through the convolution process, which as you mentioned seems to cut down the adder multipliers (in this case to 3 with ~130 taps). However it appears that the number of registers goes very high. Is there something i am not getting conceptually or is this roughly how you would have coded it? I think Altera uses block ram in their megafunction to possibly offset some of these troubles. I inferred block ram before but have not yet used it for this project... any recommendations?
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with 3 (say 16 bit) mults inside dsp blocks plus accumulator (32 bits) plus control and one ram I expect few hundred registers to be used. You better use ram/rom block ip
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