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mark_lee's avatar
mark_lee
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

a10 SR-IOV example

hi team

where can i downloal the SR-IOV example for ariia10 device?

thanks!

11 Replies

    • mark_lee's avatar
      mark_lee
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago

      Hi KhaiChein

      I had refer to the UG "Intel® Arria® 10 Avalon® Streaming with SR-IOV IP for PCIe* User Guide ", when i run simulate in ModelSim, I get errors.

      By the way , I can not generate Example Design


  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,

    You may generate the example design by selecting the correct settings in "Example Designs" tab and clicking on "Generate Example Design".

    Thanks

    Best regards,

    KhaiY

    • mark_lee's avatar
      mark_lee
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago

      Hi KhaiChein

      I had open the sr_iov Qsys "sriov2_target_g3x8_1pf_4vf.qsys" by "Quartus (Quartus Prime 18.1) Standard Edition", follow the step explained in the "Intel® Arria® 10 Avalon® Streaming with SR-IOV IP for PCIe* User Guide". and I Compiling and Simulating the Design for SR-IOV in ModelSim .

      When clicking on "Generate Example Design" to get an example I get an error like this :

      I disenable the LMI,and clicking on "Generate Example Design" to get an example I get an error like this :

      Is there something wrong ? or the Qsys can not Generate Example Design with set "Application interface type " =Avalon-ST with SR-IOV?

  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    Upon checking internally, the <install_dir>/ip/altera/ altera_pcie/altera_pcie_a10_ed/ example_design/a10/sriov2_top_target_gen3x8_1pf_4vf.qsys is the example design and you do not need to regenerate the example design using the IP GUI. Regarding the simulation, you have to rename the qsys file to top.qsys and generate the testbench system following the steps in 2.3.


    I tried to simulate the design with the name sriov2_top_target_gen3x8_1pf_4vf.qsys and top.qsys. The sriov2_top_target_gen3x8_1pf_4vf.qsys gives error message: Error loading design and the top.qsys simulation is successful.


    Could you try to rename the qsys to top.qsys before testbench generation?


    Thanks

    Best regards,

    KhaiY


    • mark_lee's avatar
      mark_lee
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago

      Hi KhaiChein

      I had rename the Qsys file to top.qsys ,and sucess Compiling and Simulating the Design for SR-IOV in ModelSim with the message " Simulation stopped due to successful completion! Simulation passed"

      Is the "sriov2_top_target_gen3x8_1pf_4vf.qsys" only for Simulating by ModelSim ?

      What I want is an sr-iov example designs for A10 ,which can be run on my board include drivers for the host PC (linux in my case).

      In intel web there have sr-iov example designs for S10, but I can,t find the download link like this page:

      https://fpgacloud.intel.com/devstore/platform/14.0.0/Standard/stratix-v-pcie-with-sr-iov-reference-design/?wapkw=sr%20iov

  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    Yes, I was out yesterday.

    Is the "sriov2_top_target_gen3x8_1pf_4vf.qsys" only for Simulating by ModelSim ?

    The supported simulator includes Mentor ModelSim*, Mentor VCS* and Cadence NCSim*

    https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_sriov.pdf (Table 7).


    What I want is an sr-iov example designs for A10 ,which can be run on my board include drivers for the host PC (linux in my case).

    In intel web there have sr-iov example designs for S10, but I can,t find the download link like this page:

    In the A10 UG, it is mentioned that the SR-IOV variant does not support the example design generation. The Getting Started with the SR-IOV Design Example chapter provides an example with simulation and Quartus Prime compilation. Therefore, the driver for this is not available.


    If you are interested in S10 SRIOV example design with driver, you may refer to this video https://www.youtube.com/watch?v=tO8mORtZ8X0


    Thanks

    Best regards,

    KhaiY


  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


    Best regards,

    KhaiY


    • mark_lee's avatar
      mark_lee
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago

      Hi KhaiChein

      thank you for you help and reply , I had get S10 SRIOV example design with driver.

  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


    Best regards,

    KhaiY