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Altera_Forum's avatar
Altera_Forum
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15 years ago

2D median filter

Hi,

Using median filter need to install the suite Megacore Function?.

I try following the 2d median filter[/b] v1.0.0 megacore function release notes.[/b] (http://www.altera.com/literature/rn/rn_2dmedian_100.pdf?gsa_pos=2&wt.oss_r=1&wt.oss=median%20filter)

However, when reach the installer source directory. It says need the window installer directory to proceed. I thought all the files should be save in the quartus folder?

Can anyone gives me some advice on this as i could not proceed my project now.

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    why not use Quartus II 10.1 Web Edition? it will come with 2D Median Filter installed

  • Altera_Forum's avatar
    Altera_Forum
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    I am using Quartus II 10.0 Web Edition. I found the 2D median filter in the megawizard. However, after initialize the signal, when creating the module, it shows error.

  • Altera_Forum's avatar
    Altera_Forum
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    there's a note in the MegaCore errata about generating VIP Suite cores with administrator rights

    there are also some problems generating IP if you did not install the Stratix II family, this also should be in the errata

    i'd still recommend using 10.1sp1 Web Edition
  • Altera_Forum's avatar
    Altera_Forum
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    I manage to generate it with no error but i don't know how to use. How to assign the signals to the input of the module?

    I have segmented the object image which i needed out from the captured image. Now i hope to use median filter to minimize the noise pixel. My RGB pixel each is 10 bits.
  • Altera_Forum's avatar
    Altera_Forum
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    are you using SOPC Builder? you might try and build your segmentation IP with an Avalon-ST interface, so you can use SOPC Builder/Qsys which makes putting the VIP blocks together much easier. you can take a look at the VIP Suite User Guide and Avalon Interface Specifications documents to get a better feel for what the Avalon-ST packets look like

  • Altera_Forum's avatar
    Altera_Forum
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    I not using sopc. My design all written in verilog. Is there any reference provided for this ?