Forum Discussion
LCard2
New Contributor
New Contributor.qip and .sip generated files manually added to project . On compile entities in .qip not found. Before I start cutting and pasting modules into existing.v files, what's proper way to incorporate these PLLs? Details of transcript warnings below.
Warning (20013): Ignored 16 assignments for entity "IPpll" -- entity does not exist in design Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity IPpl...
Vicky1
Regular Contributor
Regular ContributorHi Len,
Please provide below details,
1. Quartus Edition & version used
2. specific PLL IP
3. specific Modelsim (Altera or Intel & License or free)
here you need to instantiate the IP from generated HDL file of IP in top level design.
For simulation refer the below link,
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_gs_msa_qii.pdf
Regards,
Vikas
