XAUI Phy in Stratix IV GX

Thanks for the reply.

Do I really need the alt2gxb_reconfig module for the Stratix IV GX Development Kit? On the reference manual is written that is not mandatory.

I was connecting the xgmii_rx_clk to xgmii_tx_clk (XAUI), tx_clk (MAC) and rx_clk (MAC). Everytime I tried to read/write on MAC Registers, the waitrequest signal asserted and never went low. I've solved this by connecting all TX clocks to a 156.25 PLL clock (since there was no clock coming from xgmii_rx_clk). Now I can read/write on all registers.

Now I'm trying to send signals by using a NIOS connected to a DC MM-to-ST FIFO, but the data doesn't come back. So I can't use the hsmc loopback to test this module?

Best regards.