Writing to HPS memory from FPGA

I've decided to use the linked github example by using a driver for the DMA in the HPS to manage the data transfer.

Data transfers are working, reading data into my module is not. I'm not quite sure what the problem is, it seems the read request via the MM master to the slave input of the on-chip RAM is stalling. From what I understand, if I configure my master to use symbols for addressing I'm counting in bytes. So if I want to read a 128 bit word I assert read and the needed address, wait until the waitrequest signal goes low to deassert my read and then wait for readdatavalid to be asserted. If I want to access the next word I would increment the address by 16 (for the 16 bytes I just read) and do the whole thing again. But I'm either not getting the readdatavalid or waitrequest is constantly asserted. Or my addressing is wrong (I use the address range as given in Platform Designer) and I need to increment the address by only 1 to access the next word?

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