New ContributorWriting to HPS memory from FPGA
Hello everyone,
I'm trying to build a system based on the CycloneV to make use of the FPGA for some calculations and use the results on the HPS.
So far I'm pretty sure I have figured out transfering data to the FPGA via some OCR based on https://github.com/robertofem/CycloneVSoC-examples (at least the example works, if it actually works with getting data from the OCR into my module remains to be seen).
I wanted to write my output as 128bit bundles via the F2H-bridge to the memory of the HPS, mastering the write from the FPGA side. For that I have connected an Avalon Memory Mapped Master in my component to the f2h-slave in the HPS via the Platform Designer. From my understanding I should be able to access the data on the HPS by mapping the memory starting with 0xC0000000 as a base (the HPS2FPGA bridge base address) and adding an offset. On the FPGA side I'm writing to the address at 0xC0000000+offset. I should be able to now see the data on the HPS, shouldn't I? If I read the contents of the address right now I only get scrambled data instead of the bit pattern I wrote.
I would prefer to not write the output to FPGA OCR and then read that via the DMA mastered by the HPS to reduce needed synchronization between the HPS and FPGA (and because memory is precious).
I looked at the example on this side for the FPGA-to-HPS-bridge-design but that writes directly to the sdram via the FPGA-SDRAM bridge (with all the coherency issues). Is the example the only way or would my design work?
On that note, is there a good way to read data directly from the HPS RAM via the FPGA without using the first example without too much latency? In the end my design should be able to transfer about 2MB of data in less than 50ms from HPS to FPGA and about 1MB of data from FPGA to HPS in about the same timeframe.
Thank you for your time in advance!
