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Altera_Forum's avatar
Altera_Forum
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8 years ago

Write/Read RAM memory from FPGA.

Hello. I'm using de0-nano-SoC kit for some experiments. I'v already figure out how to access to the RAM memory from HPS side, I can read or write data there (trough /dev/mem). So I don't have problems with Linux/"C" part.

The next step is writing/read data from FPGA. I use DE0_NANO_SOC_GHRD as base project. It has "onchip_memory2_0" added in Qsys, so I didn't make any changes there. Then I'v added "RAM: 1-PORT" symbol to the project ( https://screencast.com/t/6gt4ctty ).

What I have to do now, to access this Symbol on my "GHRD" base project? As I understand i have to write code in ghrd.v but I don't know how))

Please, provide small peace of code where I can assign first byte of RAM to 0x1 for example, or redirect me to some tutorial, where I can understand clearly how to implement symbols (such as "RAM: 1-PORT") in the code.

Many thanks! :)

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Ok, I see that I don't need to import "RAM: 1-PORT" symbol from IP Catalog, because "onchip_memory2" block in Qsys is already here. Then I need Just small example how to access RAM from ghrd.v file. The Qsys onchip_memory2 says that it starts from 0x0000000 to 0x0000ffff . How to write data to these adresses in Verilog?

  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Hooray)

    Probably it helps for someone:

    soc_system_onchip_memory2_0 m(

    .address(1)

    , .byteenable(4'b1111)

    , .chipselect(1'b1)

    , .clk(FPGA_CLK1_50)

    , .clken(1'b1)

    , .reset(hps_fpga_reset_n)

    , .reset_req(1'b0)

    , .write(1'b1)

    , .writedata(32'hF0F0F0F0)

    , .readdata(datain)

    );

    here we write 0xF0F0F0F0 to the address 1 of RAM : https://screencast.com/t/hgfjc3wcc0uu

    for this moment I can't read it from /dev/mem on linux, but keep digging :)
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    So I use the following code in Verilog: 

    soc_system_onchip_memory2_0 m(
.address(0)
, .byteenable(4'b1111)
, .chipselect(1)
, .clk(FPGA_CLK1_50)
, .clken(1'b1)
, .reset(hps_fpga_reset_n)
, .reset_req(1'b0)
, .write(1'b1)
, .writedata(32'hF0F0F0F0)
, .readdata(datain)
);

    1. In my "In-system memory content editor" I can see two Instances, in my second instance I can see these bytes : https://screencast.com/t/yokucok2pkxj

    2. On my C code I use /dev/mem with 

    base = mmap( NULL, HW_REGS_SPAN, ( PROT_READ | PROT_WRITE ), MAP_SHARED, fd, ALT_AXI_FPGASLVS_OFST );

    where ALT_AXI_FPGASLVS_OFST = 0xC0000000

    When I do write bytes trough C with this base I can see it in my FIRST Instance in memory editor : https://screencast.com/t/5w9ljt1jjtp

    Please give me advice how can I finally or get bytes from first instance on my FPGA, or how I can bytes from second instance on HPS.

    Many thanks!
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Hay skliarovartem, did you figure out how to do that? I'm actually stuck in this since more than a week :unsure:

    I would really appreciate any help.
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    yes, you have to set onchip_memory in dual port mode in qsys. one port you can use for C code and second port from fpga