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Altera_Forum's avatar
Altera_Forum
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8 years ago

Width of Slave id(4) must be min 5. Increase slave ID width or reduce connected maste

Hello, I have used the Arria 10 Soc design from rocketboard to which I am making few modifications. I am getting the following error in qsys when I exceed a particular number of connections.(to H...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Check the setup of whatever FPGA masters are connected to the bridge. Something is not matching up.