Forum Discussion
Altera_Forum
Honored Contributor
14 years agoWhy Quartus cannot recognise my state machine
Hi all, We have implemented a state machine in a Stratix V project however we cannot find it in either state machine viewer or compilation report. Could anyone give some hints that does Quartus...
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- You will see the states that way since Quartus will see the state machine and encode the states. Looks like Quartus re-encoded your states as one-hot and this happens to be Quartus's default. /Boris --- Quote End --- Thanks. However even if we set (* syn_encoding = "user" *), signaltap still gives the same result. Is there any way to prevent quartus to do such encoding things and just to use the registers defined in the code. In xilinx ISE and chipscope, you can definitely see the state registers if you want to. Thanks