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Altera_Forum
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8 years ago

Why happens the message "component" is outside the master's address range in QSYS?

In my course I'm designing a flash controller in FPGA and integrating everything with QSYS to load in the board and debug. I connected the controller I made with the clock through an avalon MM breac...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi,

Can you re-attache image with the error,Not able to view the image attached.

I have tried to generate error but not succeed,Can you provide me information like which all IP you used and screen short of address map tab.

Check the link which may help,

Answered by Daixiwen.

https://www.alteraforum.com/forum/showthread.php?t=33226

https://alteraforum.com/forum/archive/index.php/t-55243.html

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)