Why happens the message "component" is outside the master's address range in QSYS?

In my course I'm designing a flash controller in FPGA and integrating everything with QSYS to load in the board and debug. I connected the controller I made with the clock through an avalon MM breach as it can be seen in the picture

https://alteraforum.com/forum/attachment.php?attachmentid=14671&stc=1

, I was getting the error message:

"component" is outside the master's address range

The data width of my flash is 24 bits.

My teacher has fixed this by editing the breach and inputting a larger data width of 32 bits. And just told me, it has to be larger than the flash, but he did not clarify why and left.

I wish to know the reason for this. thanks in advance.