Forum Discussion
NikoR
Occasional Contributor
3 months agoWhy does PTA show zero W for F-tiles in Hierarchical Design Editor
Why is there no power shown in the Hierarchical Design Editor(25.3: Current Level Dynamic Power, 26.1: Self Dynamic Power) when adding a fully utilized F-tile?
The Total Power does however show the expected power.
Is it a bug or a feature?
2 Replies
- Farabi_Altera
Regular Contributor
Hello,
Do you have the ptc file you can share? I can verfy in Altera environment.
regards,
Farabi
- Farabi_Altera
Regular Contributor
Hello,
You need to run full compilation and assign all pins correctly, then PTA will show the correct power report. I tried in Altera environment and can see all the power rails reported correctly.
regards,
Farabi