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Kevin52's avatar
Kevin52
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3 months ago

Why 10AS016C4U19E3SG could use the x16 DDR4 component upper byte lane[DQ8~DQ15] for ECC?

Hi team, there are three x16 DDR4 components 【MT40A512M16LY-075:E】 in my board, The upper 8 bits of the lastcomponents are used for ECC. but I learn about a rule from Micron applicatio...
yoichiK_intel's avatar
yoichiK_intel
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3 months ago

Hi

Yes, Upper byte lane (DQ[15:8]) could be used for the ECC bits

  • Kevin52's avatar
    Kevin52
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    3 months ago

    Hi，

    could you please tell me why Arria10 can support ？ Micron said PDA is only enabled by DQ0 , thank you very much！