Forum Discussion

Kevin52's avatar
Kevin52
Icon for New Contributor rankNew Contributor
11 months ago

Why 10AS016C4U19E3SG could use the x16 DDR4 component upper byte lane[DQ8~DQ15] for ECC?

Hi team, there are three x16 DDR4 components 【MT40A512M16LY-075:E】 in my board, The upper 8 bits of the lastcomponents are used for ECC. but I learn about a rule from Micron applicatio...
yoichiK_altera's avatar
yoichiK_altera
Icon for Contributor rankContributor
11 months ago

Hi

Yes, Upper byte lane (DQ[15:8]) could be used for the ECC bits

  • Kevin52's avatar
    Kevin52
    Icon for New Contributor rankNew Contributor
    11 months ago

    Hi，

    could you please tell me why Arria10 can support ？ Micron said PDA is only enabled by DQ0 , thank you very much！