Altera_ForumHonored Contributor12 years agoWhich pin is PLL1_CLKOUTp in EP4CE15F256? Hi, I managed to take advantage of the ATLPLL in EP4CE15F256. I think I should assign the clock output pin to a dedicated single-ended pin named "PLL1_CLKOUTp", for outputting a reference clo...Show More
Recent DiscussionsCyclone-V SCFIFO - adding ECC to M10K/MLAB/Auto memoryWill serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?System PLL of Agliex5 PCIE example design cannot be locked after configurationJTAG Chain Broken on Agilex 7-I Dev KitRequest for Cyclone V Pinout File Information