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XQSHEN's avatar
XQSHEN
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

which is better clock for FPGA Max10M16DCU324

1) use clock oscillator with LVCMOS connect to clock input pin p directly. 2) use LVDS oscillator as Microchip DSA1103 connect differential input with 100ohm + capacitor in clock input p +n whi...
  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    4 years ago

    Hi there

    Intel FPGA support both single ended and differential clock input. There are different factors to be considered such as application, board design and etc, it is subjective to comment which is better.

    Thanks.

    Eng Wei

EngWei_O_Intel's avatar
EngWei_O_Intel
Icon for Frequent Contributor rankFrequent Contributor
4 years ago

Hi there

Intel FPGA support both single ended and differential clock input. There are different factors to be considered such as application, board design and etc, it is subjective to comment which is better.

Thanks.

Eng Wei