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Altera_Forum
Honored Contributor
10 years agoProblem solved, maybe....
This clk_0 seems to be a clk bridge module, or CLK and reset generation interface. When working as bridge, it is used to drive multiple internal components using external clk and reset. When working as clk and reset generation interface, from 'Show Signal Name' tab when adding this component, reset seems to be low-active. Not 100% sure whether I am correct... Really hate reading these datasheet with obscure statement~~