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Altera_Forum
Honored Contributor
18 years agoWhere can I find clock mux?
Hi, everyone. In my project, 2M,4M,8M and 16M bitstreams will be transived to the reciver. For the reciver, it must know the clock which the bitstream contains. The cyclones have no DPA or CDR, so...
Altera_Forum
Honored Contributor
18 years agoThanks , Rysc. I have two parts in my design. One is the transmitter, which will pack the data at 2M-16M. The other is the receiver , which recives the changed-speed data and then pack the recived data at higher speed datastream(such as 32M or higher).
For the reciver, before writing the data into FIFO , sampling-correctly is needed, so i must know the clock of the transmitter, problerm is that i can't get the clock from the transmitter, i have to create new clock to sample the data from the transmitter. For the transmitter, the clocks are generated from the same clock source, the speed of the data sources change from 2 to 16M. The focus is how the created clock sample the data correctly , stable sampling is badly needed. Altclkcntrl solution tends to be much better. So , what about your ideas? Thanks very much.