Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThanks for your reply, FvM.
May be we can define the maximum FPGA input current rating for dynamical overshoots, with PCI diode, is 10 mA, that's right? If so, we should limit the driver maximum output current the same as this value, without series termination. But, in AN447 Table 3, give the Maximum Allowed Current from driver is 30-mA for a 3.3V to 3.3V interface without series termination, this value is much more than the allowed 10 mA PCI diode current limit. So mysterious extra current! May be it's to control the overshoot voltage at the FPGA input pin not exceed the PCI diode's foward voltage condition when driver a 50ohm transmission line, if so, there is no need to enable the FPGA input pin's PCI diode, that's right?